Locations: Santa Clara, CA
Contribute in the area of SI-related implementation methodologies at part of NVIDIA's centralized physical design engineering group. Design automation is focused on design quality assurance and simplification of design decisions in complex scenarios.
Contribute in the area of SI-related implementation methodologies at part of NVIDIA's centralized physical design engineering group. Design automation is focused on design quality assurance and simplification of design decisions in complex scenarios.
Responsibilities:
- Creation and maintenance of electronic form of SI design rule library. The library constraint system designs by enabling checkers for different interfaces (PCIE, GDDR, DP, USB, etc.). Support board and package designers to ensure correct design constraints are used in the development process.
- Structure SI procedures via script automation to enhance group productivities.
- Develop advance constraint checkers to systematically ensure critical design structures are within design envelope. The ability to work with CAD teams and design guide owners is critical.
Minimum Requirements:
- BSEE, BSCE, or equivalent international education or equivalent experience.
- One year of experience in SI-related professional experience. Previous design experience in field of graphics, desktop, or server systems is a plus.
- Working knowledge of Allegro constraint manager.
- Working experience with transient simulator like hspice and ADS.
- Scripting skills.
If interested please forward resumes directly to Xin Chang at changx@uw.edu
Fore more information about NVIDIA internships please go to http://www.nvidia.com/object/universityrecruiting-internships.html
